/* This file is autogenerated by scripts/decodetree.py.  */

typedef struct {
    int zad;
    int zn;
    int pm;
    int pn;
} arg_adda;

typedef struct {
    int imm;
} arg_disas_sme0;

typedef struct {
    int esz;
    int rs;
    int pg;
    int rn;
    int rm;
    int za_imm;
    bool v;
    bool st;
} arg_ldst;

typedef struct {
    int rv;
    int rn;
    int imm;
} arg_ldstr;

typedef struct {
    int esz;
    int rs;
    int pg;
    int zr;
    int za_imm;
    bool v;
    bool to_vec;
} arg_mova;

typedef struct {
    int zad;
    int zn;
    int zm;
    int pm;
    int pn;
    bool sub;
} arg_op;

typedef arg_disas_sme0 arg_ZERO;
static bool trans_ZERO(DisasContext *ctx, arg_ZERO *a);
typedef arg_mova arg_MOVA;
static bool trans_MOVA(DisasContext *ctx, arg_MOVA *a);
typedef arg_ldst arg_LDST1;
static bool trans_LDST1(DisasContext *ctx, arg_LDST1 *a);
typedef arg_ldstr arg_LDR;
static bool trans_LDR(DisasContext *ctx, arg_LDR *a);
typedef arg_ldstr arg_STR;
static bool trans_STR(DisasContext *ctx, arg_STR *a);
typedef arg_adda arg_ADDHA_s;
static bool trans_ADDHA_s(DisasContext *ctx, arg_ADDHA_s *a);
typedef arg_adda arg_ADDVA_s;
static bool trans_ADDVA_s(DisasContext *ctx, arg_ADDVA_s *a);
typedef arg_adda arg_ADDHA_d;
static bool trans_ADDHA_d(DisasContext *ctx, arg_ADDHA_d *a);
typedef arg_adda arg_ADDVA_d;
static bool trans_ADDVA_d(DisasContext *ctx, arg_ADDVA_d *a);
typedef arg_op arg_FMOPA_s;
static bool trans_FMOPA_s(DisasContext *ctx, arg_FMOPA_s *a);
typedef arg_op arg_FMOPA_d;
static bool trans_FMOPA_d(DisasContext *ctx, arg_FMOPA_d *a);
typedef arg_op arg_BFMOPA;
static bool trans_BFMOPA(DisasContext *ctx, arg_BFMOPA *a);
typedef arg_op arg_FMOPA_h;
static bool trans_FMOPA_h(DisasContext *ctx, arg_FMOPA_h *a);
typedef arg_op arg_SMOPA_s;
static bool trans_SMOPA_s(DisasContext *ctx, arg_SMOPA_s *a);
typedef arg_op arg_SUMOPA_s;
static bool trans_SUMOPA_s(DisasContext *ctx, arg_SUMOPA_s *a);
typedef arg_op arg_USMOPA_s;
static bool trans_USMOPA_s(DisasContext *ctx, arg_USMOPA_s *a);
typedef arg_op arg_UMOPA_s;
static bool trans_UMOPA_s(DisasContext *ctx, arg_UMOPA_s *a);
typedef arg_op arg_SMOPA_d;
static bool trans_SMOPA_d(DisasContext *ctx, arg_SMOPA_d *a);
typedef arg_op arg_SUMOPA_d;
static bool trans_SUMOPA_d(DisasContext *ctx, arg_SUMOPA_d *a);
typedef arg_op arg_USMOPA_d;
static bool trans_USMOPA_d(DisasContext *ctx, arg_USMOPA_d *a);
typedef arg_op arg_UMOPA_d;
static bool trans_UMOPA_d(DisasContext *ctx, arg_UMOPA_d *a);

static void disas_sme_extract_adda_32(DisasContext *ctx, arg_adda *a, uint32_t insn)
{
    a->zn = extract32(insn, 5, 5);
    a->zad = extract32(insn, 0, 2);
    a->pm = extract32(insn, 13, 3);
    a->pn = extract32(insn, 10, 3);
}

static void disas_sme_extract_adda_64(DisasContext *ctx, arg_adda *a, uint32_t insn)
{
    a->zn = extract32(insn, 5, 5);
    a->zad = extract32(insn, 0, 3);
    a->pm = extract32(insn, 13, 3);
    a->pn = extract32(insn, 10, 3);
}

static void disas_sme_extract_disas_sme_Fmt_0(DisasContext *ctx, arg_disas_sme0 *a, uint32_t insn)
{
    a->imm = extract32(insn, 0, 8);
}

static void disas_sme_extract_disas_sme_Fmt_1(DisasContext *ctx, arg_mova *a, uint32_t insn)
{
    a->rs = plus_12(ctx, extract32(insn, 13, 2));
    a->pg = extract32(insn, 10, 3);
    a->zr = extract32(insn, 5, 5);
    a->esz = extract32(insn, 22, 2);
    a->v = extract32(insn, 15, 1);
    a->to_vec = 0;
    a->za_imm = extract32(insn, 0, 4);
}

static void disas_sme_extract_disas_sme_Fmt_2(DisasContext *ctx, arg_mova *a, uint32_t insn)
{
    a->rs = plus_12(ctx, extract32(insn, 13, 2));
    a->pg = extract32(insn, 10, 3);
    a->zr = extract32(insn, 5, 5);
    a->esz = 4;
    a->v = extract32(insn, 15, 1);
    a->to_vec = 0;
    a->za_imm = extract32(insn, 0, 4);
}

static void disas_sme_extract_disas_sme_Fmt_3(DisasContext *ctx, arg_mova *a, uint32_t insn)
{
    a->rs = plus_12(ctx, extract32(insn, 13, 2));
    a->pg = extract32(insn, 10, 3);
    a->zr = extract32(insn, 0, 5);
    a->esz = extract32(insn, 22, 2);
    a->v = extract32(insn, 15, 1);
    a->to_vec = 1;
    a->za_imm = extract32(insn, 5, 4);
}

static void disas_sme_extract_disas_sme_Fmt_4(DisasContext *ctx, arg_mova *a, uint32_t insn)
{
    a->rs = plus_12(ctx, extract32(insn, 13, 2));
    a->pg = extract32(insn, 10, 3);
    a->zr = extract32(insn, 0, 5);
    a->esz = 4;
    a->v = extract32(insn, 15, 1);
    a->to_vec = 1;
    a->za_imm = extract32(insn, 5, 4);
}

static void disas_sme_extract_disas_sme_Fmt_5(DisasContext *ctx, arg_ldst *a, uint32_t insn)
{
    a->rs = plus_12(ctx, extract32(insn, 13, 2));
    a->pg = extract32(insn, 10, 3);
    a->esz = extract32(insn, 22, 2);
    a->rn = extract32(insn, 5, 5);
    a->rm = extract32(insn, 16, 5);
    a->v = extract32(insn, 15, 1);
    a->st = extract32(insn, 21, 1);
    a->za_imm = extract32(insn, 0, 4);
}

static void disas_sme_extract_disas_sme_Fmt_6(DisasContext *ctx, arg_ldst *a, uint32_t insn)
{
    a->rs = plus_12(ctx, extract32(insn, 13, 2));
    a->pg = extract32(insn, 10, 3);
    a->rn = extract32(insn, 5, 5);
    a->esz = 4;
    a->rm = extract32(insn, 16, 5);
    a->v = extract32(insn, 15, 1);
    a->st = extract32(insn, 21, 1);
    a->za_imm = extract32(insn, 0, 4);
}

static void disas_sme_extract_ldstr(DisasContext *ctx, arg_ldstr *a, uint32_t insn)
{
    a->rn = extract32(insn, 5, 5);
    a->rv = plus_12(ctx, extract32(insn, 13, 2));
    a->imm = extract32(insn, 0, 4);
}

static void disas_sme_extract_op_32(DisasContext *ctx, arg_op *a, uint32_t insn)
{
    a->pm = extract32(insn, 13, 3);
    a->pn = extract32(insn, 10, 3);
    a->sub = extract32(insn, 4, 1);
    a->zn = extract32(insn, 5, 5);
    a->zad = extract32(insn, 0, 2);
    a->zm = extract32(insn, 16, 5);
}

static void disas_sme_extract_op_64(DisasContext *ctx, arg_op *a, uint32_t insn)
{
    a->pm = extract32(insn, 13, 3);
    a->pn = extract32(insn, 10, 3);
    a->sub = extract32(insn, 4, 1);
    a->zn = extract32(insn, 5, 5);
    a->zad = extract32(insn, 0, 3);
    a->zm = extract32(insn, 16, 5);
}

bool disas_sme(DisasContext *ctx, uint32_t insn)
{
    union {
        arg_adda f_adda;
        arg_disas_sme0 f_disas_sme0;
        arg_ldst f_ldst;
        arg_ldstr f_ldstr;
        arg_mova f_mova;
        arg_op f_op;
    } u;

    switch ((insn >> 24) & 0xff) {
    case 0x80:
        /* 10000000 ........ ........ ........ */
        switch (insn & 0x00e00008) {
        case 0x00800000:
            /* 10000000 100..... ........ ....0... */
            disas_sme_extract_op_32(ctx, &u.f_op, insn);
            switch ((insn >> 2) & 0x1) {
            case 0x0:
                /* 10000000 100..... ........ ....00.. */
                /* ../git/target/arm/tcg/sme.decode:74 */
                if (trans_FMOPA_s(ctx, &u.f_op)) return true;
                break;
            }
            break;
        case 0x00c00000:
            /* 10000000 110..... ........ ....0... */
            /* ../git/target/arm/tcg/sme.decode:75 */
            disas_sme_extract_op_64(ctx, &u.f_op, insn);
            if (trans_FMOPA_d(ctx, &u.f_op)) return true;
            break;
        }
        break;
    case 0x81:
        /* 10000001 ........ ........ ........ */
        disas_sme_extract_op_32(ctx, &u.f_op, insn);
        switch (insn & 0x00e0000c) {
        case 0x00800000:
            /* 10000001 100..... ........ ....00.. */
            /* ../git/target/arm/tcg/sme.decode:77 */
            if (trans_BFMOPA(ctx, &u.f_op)) return true;
            break;
        case 0x00a00000:
            /* 10000001 101..... ........ ....00.. */
            /* ../git/target/arm/tcg/sme.decode:78 */
            if (trans_FMOPA_h(ctx, &u.f_op)) return true;
            break;
        }
        break;
    case 0xa0:
        /* 10100000 ........ ........ ........ */
        switch (insn & 0x00e00008) {
        case 0x00800000:
            /* 10100000 100..... ........ ....0... */
            disas_sme_extract_op_32(ctx, &u.f_op, insn);
            switch ((insn >> 2) & 0x1) {
            case 0x0:
                /* 10100000 100..... ........ ....00.. */
                /* ../git/target/arm/tcg/sme.decode:80 */
                if (trans_SMOPA_s(ctx, &u.f_op)) return true;
                break;
            }
            break;
        case 0x00a00000:
            /* 10100000 101..... ........ ....0... */
            disas_sme_extract_op_32(ctx, &u.f_op, insn);
            switch ((insn >> 2) & 0x1) {
            case 0x0:
                /* 10100000 101..... ........ ....00.. */
                /* ../git/target/arm/tcg/sme.decode:81 */
                if (trans_SUMOPA_s(ctx, &u.f_op)) return true;
                break;
            }
            break;
        case 0x00c00000:
            /* 10100000 110..... ........ ....0... */
            /* ../git/target/arm/tcg/sme.decode:85 */
            disas_sme_extract_op_64(ctx, &u.f_op, insn);
            if (trans_SMOPA_d(ctx, &u.f_op)) return true;
            break;
        case 0x00e00000:
            /* 10100000 111..... ........ ....0... */
            /* ../git/target/arm/tcg/sme.decode:86 */
            disas_sme_extract_op_64(ctx, &u.f_op, insn);
            if (trans_SUMOPA_d(ctx, &u.f_op)) return true;
            break;
        }
        break;
    case 0xa1:
        /* 10100001 ........ ........ ........ */
        switch (insn & 0x00e00008) {
        case 0x00800000:
            /* 10100001 100..... ........ ....0... */
            disas_sme_extract_op_32(ctx, &u.f_op, insn);
            switch ((insn >> 2) & 0x1) {
            case 0x0:
                /* 10100001 100..... ........ ....00.. */
                /* ../git/target/arm/tcg/sme.decode:82 */
                if (trans_USMOPA_s(ctx, &u.f_op)) return true;
                break;
            }
            break;
        case 0x00a00000:
            /* 10100001 101..... ........ ....0... */
            disas_sme_extract_op_32(ctx, &u.f_op, insn);
            switch ((insn >> 2) & 0x1) {
            case 0x0:
                /* 10100001 101..... ........ ....00.. */
                /* ../git/target/arm/tcg/sme.decode:83 */
                if (trans_UMOPA_s(ctx, &u.f_op)) return true;
                break;
            }
            break;
        case 0x00c00000:
            /* 10100001 110..... ........ ....0... */
            /* ../git/target/arm/tcg/sme.decode:87 */
            disas_sme_extract_op_64(ctx, &u.f_op, insn);
            if (trans_USMOPA_d(ctx, &u.f_op)) return true;
            break;
        case 0x00e00000:
            /* 10100001 111..... ........ ....0... */
            /* ../git/target/arm/tcg/sme.decode:88 */
            disas_sme_extract_op_64(ctx, &u.f_op, insn);
            if (trans_UMOPA_d(ctx, &u.f_op)) return true;
            break;
        }
        break;
    case 0xc0:
        /* 11000000 ........ ........ ........ */
        switch ((insn >> 16) & 0x3f) {
        case 0x0:
            /* 11000000 ..000000 ........ ........ */
            disas_sme_extract_disas_sme_Fmt_1(ctx, &u.f_mova, insn);
            switch ((insn >> 4) & 0x1) {
            case 0x0:
                /* 11000000 ..000000 ........ ...0.... */
                /* ../git/target/arm/tcg/sme.decode:31 */
                if (trans_MOVA(ctx, &u.f_mova)) return true;
                break;
            }
            break;
        case 0x1:
            /* 11000000 ..000001 ........ ........ */
            disas_sme_extract_disas_sme_Fmt_2(ctx, &u.f_mova, insn);
            switch (insn & 0x00c00010) {
            case 0x00c00000:
                /* 11000000 11000001 ........ ...0.... */
                /* ../git/target/arm/tcg/sme.decode:33 */
                if (trans_MOVA(ctx, &u.f_mova)) return true;
                break;
            }
            break;
        case 0x2:
            /* 11000000 ..000010 ........ ........ */
            disas_sme_extract_disas_sme_Fmt_3(ctx, &u.f_mova, insn);
            switch ((insn >> 9) & 0x1) {
            case 0x0:
                /* 11000000 ..000010 ......0. ........ */
                /* ../git/target/arm/tcg/sme.decode:36 */
                if (trans_MOVA(ctx, &u.f_mova)) return true;
                break;
            }
            break;
        case 0x3:
            /* 11000000 ..000011 ........ ........ */
            disas_sme_extract_disas_sme_Fmt_4(ctx, &u.f_mova, insn);
            switch (insn & 0x00c00200) {
            case 0x00c00000:
                /* 11000000 11000011 ......0. ........ */
                /* ../git/target/arm/tcg/sme.decode:38 */
                if (trans_MOVA(ctx, &u.f_mova)) return true;
                break;
            }
            break;
        case 0x8:
            /* 11000000 ..001000 ........ ........ */
            disas_sme_extract_disas_sme_Fmt_0(ctx, &u.f_disas_sme0, insn);
            switch (insn & 0x00c0ff00) {
            case 0x00000000:
                /* 11000000 00001000 00000000 ........ */
                /* ../git/target/arm/tcg/sme.decode:24 */
                if (trans_ZERO(ctx, &u.f_disas_sme0)) return true;
                break;
            }
            break;
        case 0x10:
            /* 11000000 ..010000 ........ ........ */
            switch (insn & 0x00c00018) {
            case 0x00800000:
                /* 11000000 10010000 ........ ...00... */
                disas_sme_extract_adda_32(ctx, &u.f_adda, insn);
                switch ((insn >> 2) & 0x1) {
                case 0x0:
                    /* 11000000 10010000 ........ ...000.. */
                    /* ../git/target/arm/tcg/sme.decode:63 */
                    if (trans_ADDHA_s(ctx, &u.f_adda)) return true;
                    break;
                }
                break;
            case 0x00c00000:
                /* 11000000 11010000 ........ ...00... */
                /* ../git/target/arm/tcg/sme.decode:65 */
                disas_sme_extract_adda_64(ctx, &u.f_adda, insn);
                if (trans_ADDHA_d(ctx, &u.f_adda)) return true;
                break;
            }
            break;
        case 0x11:
            /* 11000000 ..010001 ........ ........ */
            switch (insn & 0x00c00018) {
            case 0x00800000:
                /* 11000000 10010001 ........ ...00... */
                disas_sme_extract_adda_32(ctx, &u.f_adda, insn);
                switch ((insn >> 2) & 0x1) {
                case 0x0:
                    /* 11000000 10010001 ........ ...000.. */
                    /* ../git/target/arm/tcg/sme.decode:64 */
                    if (trans_ADDVA_s(ctx, &u.f_adda)) return true;
                    break;
                }
                break;
            case 0x00c00000:
                /* 11000000 11010001 ........ ...00... */
                /* ../git/target/arm/tcg/sme.decode:66 */
                disas_sme_extract_adda_64(ctx, &u.f_adda, insn);
                if (trans_ADDVA_d(ctx, &u.f_adda)) return true;
                break;
            }
            break;
        }
        break;
    case 0xe0:
        /* 11100000 ........ ........ ........ */
        disas_sme_extract_disas_sme_Fmt_5(ctx, &u.f_ldst, insn);
        switch ((insn >> 4) & 0x1) {
        case 0x0:
            /* 11100000 ........ ........ ...0.... */
            /* ../git/target/arm/tcg/sme.decode:45 */
            if (trans_LDST1(ctx, &u.f_ldst)) return true;
            break;
        }
        break;
    case 0xe1:
        /* 11100001 ........ ........ ........ */
        switch (insn & 0x00c00010) {
        case 0x00000000:
            /* 11100001 00...... ........ ...0.... */
            disas_sme_extract_ldstr(ctx, &u.f_ldstr, insn);
            switch (insn & 0x003f9c00) {
            case 0x00000000:
                /* 11100001 00000000 0..000.. ...0.... */
                /* ../git/target/arm/tcg/sme.decode:54 */
                if (trans_LDR(ctx, &u.f_ldstr)) return true;
                break;
            case 0x00200000:
                /* 11100001 00100000 0..000.. ...0.... */
                /* ../git/target/arm/tcg/sme.decode:55 */
                if (trans_STR(ctx, &u.f_ldstr)) return true;
                break;
            }
            break;
        case 0x00c00000:
            /* 11100001 11...... ........ ...0.... */
            /* ../git/target/arm/tcg/sme.decode:47 */
            disas_sme_extract_disas_sme_Fmt_6(ctx, &u.f_ldst, insn);
            if (trans_LDST1(ctx, &u.f_ldst)) return true;
            break;
        }
        break;
    }
    return false;
}
